The inventive concept relates generally to electronic memory technologies. More particularly, certain embodiments of the inventive concept relate to techniques and technologies for reprogramming NAND flash memory cells by marking some cells as blanks.
Semiconductor memory devices can be roughly divided into two categories according to whether they retain stored data when disconnected from power. These categories include volatile memory devices, which lose stored data when disconnected from power, and nonvolatile memory devices, which retain stored data when disconnected from power. Examples of volatile memory devices include dynamic random access memory (DRAM) and static random access memory (SRAM). Examples of nonvolatile memory devices include read-only memory (ROM), electrically erasable programmable read-only memory (EEPROMs), and flash memories.
Although nonvolatile memories can retain stored data when disconnected from power, there are limits to their retention capability as well as their lifetime in general. One limit on the lifetime of nonvolatile memories is limited program/erase (P/E) endurance. P/E endurance refers to the number of program and/or erase operations that a nonvolatile memory cell can withstand before it fails or becomes unreliable. For example, memory cells in a NAND flash memory device may have a P/E endurance of a hundred thousand program and/or erase operations or less. In general, the P/E endurance of a memory cell tends to decrease in proportion to decreasing dimensions and geometry. For example, while a single-bit cell in a NAND flash memory may have a P/E endurance of 100,000, a multi-level cell in a NAND flash memory may have a P/E endurance of only 10,000.
In a NAND flash memory, block erase operations tend to have a comparatively greater impact than other operations on the lifetime of a memory cell. In a typical block erase operation, for example, a very high negative voltage is applied to a bulk, and a control gate is maintained at a voltage of zero. This creates a relatively high potential difference that removes electric charge stored in a floating gate. The use of these relatively high voltages, however, adds significant wear to the erased memory cells.
In view of the limited P/E endurance of NAND flash memory devices and other forms of nonvolatile memory, there is a general need for techniques and technologies that can prolong their lifetime, especially in view of the continuing trend to decrease device dimensions.